A. Field of the Invention
The present invention relates to an electronic component and to a method of manufacturing an electronic component.
B. Description of the Related Art
Conventionally, a method is commonly known in which a semiconductor apparatus is bonded to a mounting substrate or a package via bumps such as solder. A conventional package structure is described here with reference to FIG. 11. FIG. 11 is a cross-sectional diagram showing a principal part of a semiconductor apparatus with a conventional package structure. FIG. 11 does not depict a case or external electrode terminals. As shown in FIG. 11, a rear surface of semiconductor chip 101 including a semiconductor element is bonded to circuit pattern section 104 of a front surface of insulating substrate 103, via solder bonding layer 102.
The rear surface of insulating substrate 103 is bonded to a front surface of metal plate 105 which is made of copper (Cu), for example (called a “Cu plate” below). The rear surface of Cu plate 105 is bonded to a front surface of the base member 106 via a solder bonding layer (not illustrated). Electrodes (not illustrated) which are provided on the front surface of semiconductor chip 1 (called “front surface electrodes” below) are connected to metal plate 107 via solder bonding layer 108, and are electrically connected to circuit pattern section 104 by metal plate 107.
The front surface electrodes of the semiconductor elements are made from Cu or aluminum (Al), or an alloy of these, for example. However, the solder wetting properties of Cu electrodes deteriorate due to surface oxidation. Moreover, Al electrodes have poor solder wetting properties and cannot make secure close contact with solder. Therefore, in order to bond solder bumps to the element electrodes, it is necessary to form an under-bump metal film.
This under-bump metal film is created by applying plating, such as electroless Ni/Au plating (ENIG), immersion Sn plating (ISn), immersion Ag plating (IAg), or the like, to the surface of a conducting section which is to form front surface electrodes of the semiconductor apparatus, for instance. Electroless Ni/Au plating, for example, involves sequentially forming an electroless nickel-phosphorus (NiP) alloy film and a gold (Au) film. By applying a plating film having a composition of this kind to the surface of the conducting section which is made from a conductive material such as Cu or Al, the materials which constitute the conducting section are prevented from spreading into the solder and becoming lost. Moreover, decline of solder wetting properties is prevented by oxidation of the nickel (Ni) film, and the solder wetting properties are improved.
One method proposed as a method for applying a plating such as that described above is a method which involves continuously carrying out a step of bringing the plating receiving material into contact with an electroless metal plating solution from which Au ions have been removed, and a step of bringing the plating receiving material into contact with an electroless metal plating solution including Au ions (see, for example, Japanese Patent Publication No. 3484367).
Furthermore, to propose a further method, there is an electronic component plating method in which a plating process is applied to a conducting section formed on a front surface of a substrate material, an electroless Ni film having Ni as a main component and an immersion Au film having Au as a main component are formed successively, and post-processing is then carried out to remove the Ni compound to which the immersion Au film is adhering, wherein the Ni removing solution used is a specified complexing agent selected from citric acid, glycerine, acetic acid, gluconic acid, glutaminic acid, tartaric acid, ethylene diamine tetraacetic acid, diethylene triamine pentaacectic acid, malic acid, malonic acid, sulfurous acid, ammonia and sulfaminic acid, and the post-processing implements a contact process by bringing the Ni compound into contact with the Ni removal solution, thereby removing the Ni compound from the immersion Au film (see, for example, Japanese Patent Publication No. 4096671).
The following method has been proposed as yet another technique. An Ni—P film having a two-layer structure is formed on a conducting portion formed on the front surface of a ceramic material, and an Au film is also formed on the front surface of the Ni—P film. In the Ni—P film, the first layer has a phosphorus (P) content of no less than 3 wt % and no more than 6 wt %, and the second layer has a P content exceeding 6 wt % and no more than 9 wt %, the thickness thereof being no less than 0.1 μm and no more than 1.0 μm (see, for example, Japanese Patent Application Publication No. 2006-131949).
In another method, by carrying out a pre-treatment step, a self-catalyzing Ni plating step and an immersion Au plating step, an Ni—P film and an Au film are formed successively on top of a Cu electrode formed on the surface of a ceramic material. In a post-processing step, the ceramic material on which an Au film has been formed is taken as an object for drying, the object for drying is supplied to a vacuum drying apparatus which has been reduced to a pressure of at least 13.3 Pa or lower, a vacuum drying process is carried out, and the water remaining on the interface between the Ni—P film and the Au film is removed. Instead of an Au film, it is also possible to use a metal having a lower ionization tendency than Ni, and more specifically, Ag, Cu, palladium (Pd) or platinum (Pt), or an alloy of these (see, for example, Japanese Patent Application Publication No. 2004-115902).
The following method has been proposed as yet a further method. Using connection electrodes obtained by applying Ni plating to a copper plate and then carrying out further Au plating on the surface thereof, a semiconductor element is mounted on the wiring of an insulating substrate, and a solution containing Au particles having an average particle diameter of 5 nm is applied to the emitter electrodes (upper side) of the semiconductor element. Furthermore, a Ni plating process is applied to the surface of the copper wiring pattern formed on the insulating substrate, and a solution containing Au particles is applied to the Au plating portions of the wiring which have undergone an Au plating process, in the portions which are connected with the emitter electrodes of the semiconductor element via the terminals. After drying the solution containing Au which has been applied to the semiconductor element and the wires on the insulating substrate and forming an electrode portion made from gold particles, the connection terminals are mounted on the upper portion of the electrodes which are made of gold particles, and heated to approximately 80° C. for 60 minutes, thereby connecting the semiconductor element and the wires (see, for example, Japanese Patent Application Publication No. 2005-136375).
The following method has been proposed as yet a further method. When a semiconductor element is mounted on a lead frame, a plating film of Ag or Ag alloy is applied to the bonding region between the semiconductor element and the lead frame, and a conductive adhesive containing nano-particles is used as the bonding material for mounting. The conductive adhesive is based on a thermo-curable resin, such as epoxy, which is mixed with silver particles having a particle diameter of 1 to 20 μm and silver particles having a diameter no greater than 20 nm (see, for example, Japanese Patent Application Publication No. 2007-180059).
The following method has been proposed as yet a further method. The method involves performing: a step of forming an oxide layer containing oxygen on a bonding interface of a member to be bonded, a step of arranging a bonding material containing metal compound particles having an average particle diameter of no less than 1 nm and no more than 50 μm, and a reducing agent made of an organic material, on the bonding interface, and a step of bonding the member to be bonded by heating and pressurizing the member to be bonded. After previously precipitating copper, silver or nickel by electroless plating or electroplating, before bonding, onto the bonding surface of the member to be bonded, processing is carried out to oxidize the surface of the plating metal (see, for example, Japanese Patent Application Publication No. 2008-208442).
Conventionally, when bonding a semiconductor apparatus and a mounting substrate, or bonding a semiconductor apparatus and a package, the bonding material used is a solder having a reflow resistance of approximately 260° C. and containing a large amount of lead (Pb) which imparts little thermal stress (this solder is called “high-lead-content solder” below). However, lead is a material which is harmful to the environment, and the use of lead is restricted in many countries by chemical substance regulations, such as the RoHS Directive. At the present time, high-lead-content solder is excluded, exceptionally, from the materials which are prohibited from use, but there is a need for rapid change towards materials which do not contain lead (called “lead-free materials” below).
Conventionally known examples of lead-free materials which are alternatives to high-lead-content solder include, for instance, zinc (Zn) solder, Sn—Ag solder, tin-antimony (Sn—Sb) high-temperature solder, and a resin adhesive type of high-conductivity silver paste, and recently the use of a silver particle bonding material, and the like, has been proposed.
Japanese Patent Application Publication No. 2008-208442 proposes a method in which, as a bonding method instead of soldering, bonding of high thermal resistance, high reliability and high heat radiation properties is made possible by bonding together metal surfaces formed by electroless plating or electroplating using a bonding material consisting of silver particles of which the surfaces are coated with organic material, such as a silver nano-particle bonding material. By this means, it is possible to achieve a lower bonding temperature in the bonding step during the mounting process.
However, as a result of repeated thorough research by the present inventors, the following problems were newly discovered. In the technology shown in Japanese Patent Publication Nos. 3484367 and 4096671, and Japanese Patent Application Publication Nos. 2006-131949, 2004-115902, and 2005-136375, when an Sn—Ag type solder which does not contain lead (called lead-free solder) is used as a solder, the solder has low thermal resistance, and due to the compactification of electronic components in recent years, the solder is not able to withstand harsh mounting conditions which involve an increased number of reflows during component mounting or a raised reflow temperature, for instance. Furthermore, if a Sn—Sb type of high-temperature solder is used, since the solder itself is hard, there is a problem in that the chip itself is liable to fracture during the cooling step, or the like.
Moreover, in the technology described in Japanese Patent Application Publication Nos. 2007-180059 and 2008-208442, it is proposed that a high bonding strength be obtained by bonding together silver nano-particle bonding material and plating metal as a lead-free bonding material, but the bonding strength between the silver nano-particle bonding material and the plating metal is greatly dependent on the type and film thickness of plating metal on the bonding surface and the state of the precipitated particles. Therefore, this technology is not sufficient to achieve a secure bonding strength.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.